Abstract
A 5 GS/s 8-bit analog-to-digital converter (ADC) implemented in 0.18 μm SiGe BiCMOS technology has been demonstrated. The proposed ADC is based on two-channel time-interleaved architecture, and each sub-ADC employs a two-stage cascaded folding and interpolating topology of radix-4. An open loop track-and-hold amplifier with enhanced linearity is designed to meet the dynamic performance requirement. The on-chip self-calibration technique is introduced to compensate the interleaving mismatches between two sub-ADCs. Measurement results show that the spurious free dynamic range (SFDR) stays above 44.8 dB with a peak of 53.52 dB, and the effective number of bits (ENOB) is greater than 5.8 bit with a maximum of 6.97 bit up to 2.5 GS/s. The ADC exhibits a differential nonlinearity (DNL) of -0.31/+0.23 LSB (least significant bit) and an integral nonlinearity (INL) of -0.68/+0.68 LSB, respectively. The chip occupies an area of 3.9 × 3.6 mm2, consumes a total power of 2.8 W, and achieves a figure of merit (FoM) of 10 pJ/conversion step.
Highlights
High-speed analog-to-digital converter (ADC) with moderate resolution are in high demand for applications such as the radar receiver
With the rapid development of semiconductor integrated circuits, BiCMOS technology can offer the synthesis of low power excellence of CMOS and low distortion capability of HBT [11,12], facilitating the design of high-performance ADCs
According to application requirements and cost considerations, the folding and interpolating (F&I) ADC based on SiGe BiCMOS technology is an attractive choice
Summary
High-speed ADCs with moderate resolution are in high demand for applications such as the radar receiver. The number of interleaving channels is generally large, which requires a complex calibration process. Evolved from flash and two-step topologies, the folding and interpolating (F&I) architecture has low complexity along with the advantage of high speed and low latency by enabling simultaneous operation of the coarse and fine quantization. With the rapid development of semiconductor integrated circuits, BiCMOS technology can offer the synthesis of low power excellence of CMOS and low distortion capability of HBT [11,12], facilitating the design of high-performance ADCs. Besides, the 0.18 μm SiGe BiCMOS technology is cost efficient and beneficial for special applications in low-volume manufacturing. According to application requirements and cost considerations, the F&I ADC based on SiGe BiCMOS technology is an attractive choice.
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