Abstract

In order to meet the increasing demands of wireless communication for ISM bands, a 433 MHz transmitter RF front-end is designed using a 55 nm low-power CMOS technology. The circuits consist of an active mixer, a driver amplifier and a class-E power amplifier (PA). A double-balanced Gilbert active mixer is designed to realize binary phase-shift keying (BPSK) modulation. The driver is used to preamplify the modulated RF signals. The class-E PA adopts a parallel four-branch cascode structure to control the output power level. The load network of the PA is implemented through an off-chip circuit, in which a finite DC-feed inductance load network is selected to reduce the power loss. The mixer and driver are designed with a 1.2 V supply voltage, while the PA is operated at a 1.8 V supply voltage. The area of the chip is 0.206 mm × 0.089 mm, and the measured results show that it achieves a maximum output power of 2.7 dBm, with a total power consumption of 6.72 mW. At a drain efficiency (DE) of 34.5%, an S22 less than −10 dB over the frequency ranges from 393.79 MHz to 455.70 MHz can be measured for the PA. With 192 kbps BPSK data modulated at 433 MHz, the measured EVM is about 0.83% rms.

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