A 50K bit Schottky cell bipolar read-only memory

Abstract

Describes a 50K bit read-only memory (ROM) which is used on a 7.00 mm square chip. The ROM occupies 2.53 mm/spl times/6.37 mm. The worst case access time is 36 ns and worst case power dissipation is 650 mW. Power supplies of 5.0 V/spl plusmn/10 percent and 1.7 V/spl plusmn/10 percent are required. A description of the ROM organization and operation is given and each of the individual circuits is described and illustrated. A discussion of the methods used to check the digitized layout and a brief description of the bipolar manufacturing process are given in the Appendix.