Abstract

This article presents a 16-channel 5 GS/s time-interleaved (TI) SAR ADC for a direct-sampling receiver that employs a digital-mixing background timing mismatch calibration to compensate for timing-skew errors. It uses a first-order approximation to obtain the derivative of the autocorrelation of the input signal, subsequently used to evaluate the explicit amount of the timing-skew. Therefore, this allows a digital background calibration of the timing-skew, avoiding extra analog circuits. The proposed 16-channel TI ADC uses a splitting-combined monotonic DAC switching method for the individual SAR channel to achieve a trade-off of simple switching and small common-mode voltage variation of the comparator. The prototype, implemented in 28 nm CMOS, reaches a 48.5/47.8 dB SNDR with an input signal of 2.38/4.0 GHz after the proposed background timing mismatch calibration, respectively. Furthermore, the ADC core’s power consumption is 29 mW sampling at 5 GS/s, with a Walden FoM of 26.7 fJ/conv.-step and a Schreier FoM of 157.9 dB.

Highlights

  • The direct RF sampling receiver architecture is much simpler than the traditional IF sampling one

  • REVIEW OF TIMING-SKEW CALIBRATION WITH DIGITAL-MIXING The following discussion of modeling of the TI Analog-to-digital converter (ADC) neglects the effect of quantization noise, as this permits us to fully investigate the effect of mismatches on the system

  • We demonstrate a digital calibration method that avoids extra analog circuits

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Summary

INTRODUCTION

The direct RF sampling receiver architecture is much simpler than the traditional IF sampling one. In [13] they correct the timing mismatch error in the digital domain without a tunable delay line, but an auxiliary delta-sampling ADC is necessary to estimate the skew error. The ADC core consumes 29.0 mW (inter-channel mismatch calibration off-chip), while leading to a Walden FOM of 26.7 fJ/conv.step and a Schreier FOM of 157.9 dB REVIEW OF TIMING-SKEW CALIBRATION WITH DIGITAL-MIXING The following discussion of modeling of the TI ADC neglects the effect of quantization noise, as this permits us to fully investigate the effect of mismatches on the system. In [13] the circuit presents a digital correction to eliminate the timing-skew error by adding extra auxiliary channels, based on the above detection topology Both approaches need modification/addition of analog circuits. We use a bilateral linear approximation to obtain a more accurate derivative of the autocorrelation to improve the mismatch correction

FORMULATION OF THE PROPOSED FULLY DIGITAL TIMING-SKEW CALIBRATION
SIMULATION RESULTS
EXPERIMENTAL RESULTS
CONCLUSION
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