Abstract
The design of an adjustable loop bandwidth (LBW) frequency synthesizer with an on-chip loop filter (LF) array is presented. The LF array based on the simple capacitor multiplier topology is proposed to support LBW switching between 500 kHz and 1 MHz while saving 82.9% chip size compared to the traditional LF array. The maximum capacitance of 108 pF is realized by using the capacitor multiplier with an on-chip capacitance of 6 pF. The proposed frequency synthesizer is implemented in Taiwan Semiconductor Manufacturing Company (TSMC) 0.18-μm CMOS process and supplied at 1.8 V with a current dissipation of 11.8 mA.
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