Abstract
AbstractA 5.2 GHz, 0.43 V voltage‐controlled oscillator (VCO) is designed and implemented in a 0.18 μm CMOS 1P6M process. The designed circuit topology consists of two parallel LC resonators in series with the gates of negative differential resistance transistors. At the supply voltage of 0.43 V, the output phase noise of the VCO is −116d Bc/Hz at 1 MHz offset frequency from the carrier frequency of 5.3 GHz, and the figure of merit is −187.8dBc/Hz. Total VCO core power consumption is 1.83 mW. Tuning range is about 710 MHz, from 5.54 to 4.83 GHz, whereas the control voltage was tuned from 0 to 1.2 V. © 2009 Wiley Periodicals, Inc. Microwave Opt Technol Lett 51: 1052–1055, 2009; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.24216
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
