Abstract
This paper presents a digital intermediate frequency (IF) quadrature modulator realized by a single-bit band pass sigma-delta DAC, in which a pair of single-bit-low-pass sigma-delta digital modulators is used to share the computation for doubling the speed. Fractional-delay interpolation filters are added before the sigma-delta modulators to adjust the interleaved timing relationship between the IQ paths. Carry-save algorithm is used to increase the computation speed in both sigma-delta modulators and interpolation filters, which leads to a speed improvement with little area overhead. The simulation results show that the proposed design can realize a single bit 4th order band pass sigma-delta DAC whose sampling frequency reach hundreds Mhz, and whose SFDR is up to 65 dB.
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