Abstract

The development of intermediate frequency (IF) receiver for radar is from analog system to digital system. A modular field programmable gate array (FPGA)-based digital multi-beamforming IF receiver is given in this paper. A modular hardware description language (HDL) code is developed for Virtex-6 FPGA of digital IF receiver module, with multi-channels sampling at up to 400 MegaHerz (MHz). The system consists of quadrature demodulate module, fractional delay filters module and beamforming module. A brief description of these modules is presented, and the quantization error between the ideal floating-point data type and the fixed-point data type which is implemented in the FPGA is simulated. The result shows that the FPGA-based digital multi-beamforming IF receiver provides a high-performance method for radar application.

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