A 4-M Pixel High Dynamic Range, Low-Noise CMOS Image Sensor With Low-Power Counting ADC

Abstract

In this paper, we present a 4-Mpixel high dynamic range (DR), low dark noise CMOS image sensor. The pixel design is based on a 4-T PPD structure, with one dedicated High Dynamic Range transistor added in serial with the reset transistor for changing the conversion factor during readout to enhance the DR. A low-power ramp counting Analog to Digital Convertor array is implemented to suppress the structure noise and decrease the power consumption. Measurement results show that when the sensor is operated at a full speed of 47 fps, DR of 87 dB, and dark noise of less than 2e− can be achieved. Also the proposed low-power counting method has a dramatic reduction in the current consumed by the column counters during the ADC operation compared with previous documented methods.