A 4-kbit Josephson nondestructive read-out RAM operated at 580 psec and 6.7 mW

Abstract

A fully decoded 4-kb Josephson nondestructive readout high-speed RAM with vortex transitional memory cells was designed and operated successfully. The 4-kb Josephson RAM is composed of 64-b*64-b cells, polarity-convertible drivers, address decoders using resistor coupled Josephson logic (RCJL) gates, and a resistively loaded sense circuit. The memory cells use vortex transitions in their superconducting loops for writing and reading data. The cells are activated by two control signals without timing control, while all peripheral circuits are activated by an AC power supply. This memory configuration eliminates the timing sequence needed for memory operations, resulting in a decrease in the memory operation time for an actual memory chip. The 4-kb Josephson high-speed RAM was fabricated using niobium planarization technique with a 1.5- mu m design rule. The RAM circuit size is 4.8*4.8 mm/sup 2/ and the memory cell is 55*55 mu m/sup 2/. More than 25000 Nb-AlO/sub x/-Nb Josephson junctions with approximately 1200 A/cm/sup 2/ critical current density are contained in the RAM chip. An access time of 580 ps and a power consumption of 6.7 mW are obtained for the nondestructive memory operation.