Abstract
A 4096-bit ECL random-access memory using high-density I2L memory cell has been developed. Novel ECL circuit techniques and I2L flip-flop memory cells are introduced for realizing high-speed performance, low-power operation, and small chip size. It operates typically under 20-ns access time and 300 mW of power dissipation, realizing 1.46 pJ/bit of access time and power-per-bit product, a figure of merit of memory devices. The memory cell and chip size of 1122 µm2(33 µm × 34 µm) and 9.9 mm2(3 mm × 3.3 mm), respectively, are achieved with V-groove isolated bipolar process technology. The memory is organized into 4096 words × 1 bit, and is packaged into 18-pin DIP and also 18-pad leadless chip carrier package. Development results have shown that the n-p-n-coupled superintegrated I2L flip-flop memory cell is very promising for high-speed and low-power static RAM's above 4K-bit/chip area.
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