A 40.3–50.5 GHz locking range transformer‐based injection‐locked frequency divider utilizing a high third harmonic rejection buffer

Abstract

AbstractInjection‐locked dividers feature ultrahigh operating frequency, low power consumption, and low phase noise, making them suitable for Q‐band phase‐locked loop. This paper presents a transformer‐based divide‐by‐4 injection locking frequency divider with a high third harmonic rejection buffer based on 40‐nm CMOS technology. Employing a fourth‐order transformer resonator enhances the third‐order harmonic amplitude, increasing the injection efficiency and expanding the locking range. The proposed high third harmonic rejection buffer using a source degeneration inductor can effectively suppress the output of the third harmonic caused by the resonator, ultimately yielding a clean fundamental frequency signal. Simulation results demonstrate that the proposed divide‐by‐4 injection‐locked frequency divider (ILFD) achieves a locking range of 10.2 GHz (from 40.3 to 50.5 GHz) with 0 dBm input signal. The core divide‐by‐4 ILFD circuit consumes 4.6 mW power with a 0.9 V supply and occupies an area of 0.026 mm2.