A 4-Channel Ultra-Low Power Front-End Electronics in 65 nm CMOS for ATLAS MDT Detectors

Abstract

A 4-channel front-end electronics (4 × FEE) system for the muon drift tube in the ATLAS detector in the High-Luminosity LHC is presented. The overall channel architecture is optimized to reduce the power and area of the design. Each channel comprises a charge-sensitive preamplifier (CSP), shaper, discriminator and differential low-voltage signaling drivers. The proposed channel operates with a 5–100 fC input charge and exhibits a linear sensitivity of 8 mV/fC for the entire input charge range. The peaking time delay of the analog channel is 14.6 ns. At the output, the time representation of the input signal is provided in terms of the CMOS level and in scalable low-voltage signal (SLVS). The FEE consumes a current of 10.6 mA per channel from a single 1.2 V supply voltage. The full 4 × FEE design is realized in TSMC 65 nm CMOS technology and its die-area is 2 mm × 2 mm.