Abstract
We propose a fully on-chip clock-source system in which an ultra-low-power diode-based temperature-uncompensated oscillator (OSCdiode) serves as the main clock source and frequency locks to a higher-power temperature-compensated oscillator (OSCcmp) that is disabled after each locking event to save power. The locking allows the stability of the uncompensated oscillator to stay within the stability bound of the compensated design. This paper demonstrates the functionality of a locking controller that uses a periodic (counter-based) scheme implemented on-chip and a prediction (temperature-drift-based) scheme. The flexible clock source platform is validated in a 130 nm CMOS technology. In the demonstrated system, it achieves an effective average temperature stability of 7 ppm/°C in the human body temperature range from 20 °C to 40 °C with a power consumption of 36 nW at 0.7 V. It achieves a frequency range of 12 kHz to 150 kHz at 0.7 V.
Highlights
Modern internet-of-things (IoT) devices are employed across a wide range of applications
Results across several chips for different aspects of the clock source system such as successive approximation register (SAR) calibration bits, frequency ranges, power, stability, jitter, and locking schemes are elaborated
For high-speed data converters operating at mega-samples per second speed (MSps), the clock jitter is required to be in the ps range
Summary
Modern internet-of-things (IoT) devices are employed across a wide range of applications. To generate higher frequencies in the range of 370 kHz to 3.8 MHz, a digitally controlled leakage-based oscillator along with a multiplier delay-locked loop [7] can be used, but it requires a clean reference clock such as a XTAL oscillator Such XTAL designs have achieved low power consumption recently, their biggest disadvantage for small form-factor IoT applications is that they require off-chip components, resulting in higher system volume and cost. When REF is low (settling time), the SAR logic sets the 23 configuration bits of the OSCdiode one after the other in the digital storage registers, depending on the output of the comparator (1 or 0)
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