Abstract

A clock-inverter feed-forward toggle flip-flop (CIFF-TFF) based ultra-high-speed 2:1 dynamic frequency divider is designed in a GaAs heterojunction bipolar transistor (HBT) technology with fT of 60 GHz from Win Semiconductors corporation. The co-simulation methodology of electromagnetic field and schematic diagram is utilized in the design. Through tuning the currents in the core and the other parts of the divider separately, the dynamic frequency divider approaches an operating speed of 36 GHz with a power consumption of 162 mW in the core part from a single 6 V supply. The design is currently taped out.

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