Abstract
This paper presents a high speed and low distortion sampler with two-channel time-interleaved sampler with track-and-hold amplifier (THA). The THA is based on switched source-follower with active inductor load such that wide bandwidth in tack-mode and small signal feed-through in hold-mode can be both achieved within compact area. Furthermore, one clock-controlled auxiliary transistor is also introduced to cancel clock feed-through in hold-mode. The chip was fabricated in 65nm RF-CMOS process with core area of 0.07mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> and power consumption of 192mW. The measured S-parameters show matched input and output up to 40GHz with 19.3GHz bandwidth in track-mode. The measured spurious-free-dynamic-range (SFDR) is 35dB, and total harmonic distortion (THD) is -30dB sampled at 16.26GS/s in one channel.
Sign-in/Register to access full text options 
Free) 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a call
