Abstract
A single-chip receiver for pulsed laser direct time-of-flight 3-D imaging applications has been realized in a 0.35- $\mu \text{m}$ HV CMOS technology. The chip includes a $32 \times 128$ single-photon avalanche diode (SPAD) array [35% fill factor (FF)] and 257 time-to-digital converters (TDCs) with a ~78-ps resolution. Two adjacent rows ( $2 \times 128$ SPADs) at a time can be selected for simultaneous measurement, i.e., 16 measurement cycles are needed to cover the whole array. SPADs are capable of operating in a gated mode in order to suppress dark and background light-induced detections. The IC was designed to be used in a solid-state 3-D imaging system with laser illumination concentrated in both time (short sub-ns pulses) and space (targeting only the active rows of the SPAD array). The performance of the receiver IC was characterized in a solid-state 3-D range imager with flood-pulsed illumination from a laser diode (LD)-based transmitter, which produced short [~150-ps full-width at half-maximum (FWHM)] high-energy (~3.8-nJ pulse/~14-W peak power) pulses at a pulsing rate of 250 kHz when operating at a wavelength of 810 nm. Two detector/TDC ICs formed an 8k pixel receiver, targeting a field-of-view of $\sim 42^{\circ } \times 21^{\circ }$ by means of simple optics. Frame rates of up to 20 fps were demonstrated with a centimeter-level precision in the case of Lambertian targets within a range of 3.5 m.
Highlights
O PTICAL 3-D range imagers have recently found many new applications beyond their traditional use in land surveying and geodesy [1]
The required system-level performance parameters vary considerably, especially with regard to the maximum measurement range, which varies from one meter to a few tens of meters and up to ∼200 m in traffic applications
The 6.6 mm × 5.5 mm IC consists of a 4096 single-photon avalanche diode (SPAD) array and a 257-channel to-digital converters (TDCs) array on the same die, realized in a 0.35-μm HV CMOS technology with an operating voltage of 3.3 V
Summary
O PTICAL 3-D range imagers have recently found many new applications beyond their traditional use in land surveying and geodesy [1]. These techniques offer high performance, but at the expense of relatively high average illumination power, typically at a level of hundreds of mWs even in shortrange applications if high spatial resolution is required [19] Another promising solid-state approach for developing miniaturized 3-D imagers is direct TOF (dTOF), in which the transit time of a short laser pulse to the target and back to a 2-D detector array [e.g., single-photon avalanche diode (SPAD)-based] is measured directly, e.g., with time-to-digital converters (TDCs). This article presents a SPAD/TDC receiver IC that is designed and manufactured in a 0.35-μm HV CMOS technology and supports the abovementioned solid-state 3-D imager architecture with block-based illumination Another starting point for the design presented here is that in the SPAD-based dTOF 3-D imaging, it is advantageous to concentrate the available average optical illumination power into short (sub-ns), intensive pulses since this would improve the SNR and precision, and simplify the I/O due to the lower pulsing rate (assuming a constant average illumination power).
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