A 28-GHz wideband power amplifier with dual-pole tuning superposition technique in 55-nm RF CMOS

Abstract

This paper presents a 28-GHz wideband power amplifier (PA) with the dual-pole tuning superposition technique for 5G applications in a 55-nm RF CMOS. The PA employs a four-stage pseudo-differential structure together with the two-way combining approach to enhance the power gain. Transmission-line transformer (TLT) matching networks are proposed in the PA for not only performing the impedance matching, but also tuning the peak gains of the four stages to two different pole frequencies. The dual-pole frequencies are eventually superposed to improve the bandwidth and gain. Meanwhile, techniques of capacitance neutralization, load-pulling, and power combination are adopted for power stages to improve the output power and efficiency significantly. Biased at the class-A mode by a supply voltage VDD of 1.5 V, the fabricated PA exhibites the measured peak small-signal gain (S21) of 21.9 dB and power gain (PG) of 20 dB at 28 GHz. The measured performances of saturated output power (Psat) of 15.4–16.8 dBm, output 1-dB compression point (OP1dB) of 12–13.5 dBm, and power added efficiency (PAEP1dB) of 11%–14.7% are achieved over the bandwidth of 24–30 GHz, featuring wideband linearity/PAE. The chip occupies a core area of 1.5 × 0.6 mm2.