A 28-GHz Doherty Power Amplifier With a Compact Transformer-Based Quadrature Hybrid in 65-nm CMOS

Abstract

This brief presents a single-ended, two-stage, and symmetric Doherty power amplifier (DPA). A rigorous and closed-form formula is proposed to design the transformer-based quadrature hybrid. The hybrid combines the advantages of flexibility, compactness, and low loss. A non-classic Doherty impedance inverting network is co-designed with the input network for phase matching. Besides, the parasitic parameters of the interconnects and RF pads are used to reduce the value of the inductor in the LC network. Designed and implemented in a 65-nm CMOS process, the fully integrated compact DPA prototype occupies only 0.35 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> active area. The experimental prototype operating at 28 GHz achieves 18.7 % power-added efficiency (PAE) at 6-dB power back-off (PBO). A maximum small-signal gain of 20.4 dB is achieved with a -3-dB bandwidth from 25.6 to 29.4 GHz. A saturated output power ( P <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">SAT</sub> ) of 17.5 dBm is measured with the peak PAE of 27%. At 6-dB PBO, the DPA prototype increases the efficiency by 2.8 and 1.4 times over a normalized Class-B and Class-A PA, respectively.