A 27.5‐43.5 GHz 65‐nm CMOS up‐conversion mixer with 0.42 dBm OP1dB for 5G applications

Abstract

AbstractA 27.5‐ to 43.5‐GHz up‐conversion mixer is presented for fifth‐generation (5G) applications in 65‐nm CMOS process. A two‐path transconductance stage (TPTS) is demonstrated to improve the linearity. Compared with the conventional common‐source stage, this method enhances the output 1‐dB compression point (OP1dB) by 3.45 dB only at a cost of 1‐mW extra power. Moreover, the input and output baluns are using the fourth‐order transformer‐based resonators to realize a wideband impendence matching. With a power consumption of 14 mW, the proposed up‐conversion mixer achieves OP1dB of 0.42 dBm at 38 GHz. Simultaneously, the maximum conversion gain of −5 dB, local oscillator (LO)‐to‐intermediate frequency (IF) isolation of 43 dB and LO‐to‐radio frequency (RF) isolation of 40 dB are obtained.