A 2.5mW Low-Power Dual VCO Quantizer for ∑-∆ Modulator in 0.09μm CMOS

Abstract

Analog to digital converters are an essential requirement for signal processing application as it relates to real world signal that are continuous in nature and convert it into digital form. This paper depicts design and analysis of Dual Voltage Controlled Oscillator (VCO) enabled quantizer loop structure in continuous time ∑-∆ modulator in 0.09μm technology with the use of Cadence Virtuoso tool. The Major element of continuous time ∑-∆ modulator is VCO that converts voltages in to oscillating frequency and a quantizer will quantize the respective frequency to thermometric code. Dual VCO quantizer is designed with 3stage, 5stage and 7stage ring oscillator based VCO and 1-bit quantizer having Logic structure reduced flip flop (LRFF). Maximum Bandwidth of 3stage, 5stage, and 7stage current starved ring oscillator is 40.39MHz, 17.89MHz, and 15.54MHz respectively. Return to Zero DAC (RZ-DAC) block is used as feedback path to dual VCO Quantizer to reduce even harmonics. Result analysis shows that power consumption of the entire design of dual VCO quantizer circuit turns to be 2.15mW for the supply of 1.8V in 0.09μm VLSI technology which is efficient compared to other previous works.