A 2-D Analytical Modeling of Dual Work Function Metal Gate MOSFET Using High-K Gate Dielectric with Enhanced RF/Analog Performance for Low Power Applications

Abstract

A 2-dimensional electrostatic potential modeling of fully depleted channel, with high-k based dual work function double gate (DWFDG) MOSFET, has been developed in this paper. The expression for electrostatic potential of DMDG has been developed using 2-D Poisson’s equation with appropriate device boundary conditions along the device gate length. The high-k based DWFDG MOSFET shows a significant decrease in short channel effects (SCEs), by using step in electrostatic potential near the interface of gate materials (M1) and (M2). The impact of device limitations such as electrostatic potential with oxide thickness, channel thickness, different gate bias and drain bias on the capability of the device has been examined using novel analytical model. The validation of the analytical modeling results are verified with numerical simulation by using 2-dimentional Sentaurus TCAD device simulator. In addition, the simulation has been performed for finding analog performances of the proposed device as compared with conventional device. The significant improvement in drain current, Ion/Ioff ratio, output conductance and gm/Ids have been observed. Hence, the simulation results shows that the proposed device is best suitable for faster switching and low power applications.