A 2.9 mm2 Highly Integrated Low Noise GPS Receiver in 0.18-μm CMOS Technology

Abstract

An L1 band highly integrated low noise GPS receiver in 0.18-μm CMOS is presented in this paper. The receiver adopts double conversion structure and two dynamic range control modes of variable gain amplifier (VGA) and programmable gain amplifier (PGA). The receiver includes the blocks of LNA, down-conversion mixers, band pass filter, received signal strength indicator (RSSI), VGA, PGA, 2-bit ADC, two frequency synthesizers and so on. The LNA adopts source inductive degeneration technique to achieve good noise performance, and a novel positive feedback capacitor is introduced to enhance gain. The novel gain-boosting charge pump (CP) structure acquires accurate current matching of 0.1% error which improves the output phase noise of frequency synthesizer. The measured radio performances of noise figure (NF) is only 4 dB and the maximum gain is 110 dB. The gain control range achieves 50 dB provided by PGA and VGA. The receiver occupies an area of 1.875 mm × 1.575 mm including all needed voltage reference and the 1.8 V low dropout regulator.