A 195–244 GHz CMOS self-mixing frequency tripler with >23 dBc fundamental rejection

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This paper presents a wideband and high-fundamental rejection self-mixing frequency tripler in a 40-nm CMOS. The proposed tripler consists of an input half-shielded transformer balun, an even-harmonics generator, a single-balanced mixer, a slow-wave coupling-line filter and an output half-shielded Marchand balun. The half-shielded coupling structure improves the coupling coefficient of the coupling-line components and also features high design freedom. Consequently, the half-shielded transformer balun achieves a broadband performance. The half-shielded Marchand balun achieves a 1-dB bandwidth of 109 GHz (49.7 %) and a minimum insertion loss of 1 dB. The slow-wave coupling-line filter enhances the fundamental rejection of the proposed tripler with low insertion loss of 1.5 dB, wide 1-dB bandwidth of 162 GHz (62.8 %) and compact footprint (0.01 mm2, 0.00535 λ2). The slow-wave coupling-line filter achieves a broadband low-frequency rejection over 18.6 dB from 65 to 88 GHz. Due to the above-mentioned technology, the tripler achieves a 3-dB bandwidth of 49 GHz from 195 to 244 GHz and a fundamental rejection larger than 23 dBc. Compared with the state-of-the-arts, the proposed self-mixing tripler features wide bandwidth, high fundamental rejection and compact core area among silicon-based triplers.