A 194 GHz fundamental frequency oscillator with 1.85 mW differential output power in 65nm CMOS

Abstract

A high output power and high fundamental frequency CMOS oscillator is presented in this paper. To increase output power, the source inductor at the core transistor is coupled with the drain inductor at the buffer transistor through a transformer. A capacitive load reduction circuit (CLRC) is also used to increase the fundamental oscillation frequency. The proposed single-core fundamental oscillator is implemented using 65 nm CMOS technology. The measurement results show a fundamental frequency of 194 GHz and maximum differential output power of 1.85 mW.