A 19 nV/ $\surd$ Hz Noise 2- $\mu \text{V}$ Offset 75- $\mu \text{A}$ Capacitive-Gain Amplifier With Switched-Capacitor ADC Driving Capability

Abstract

This paper describes a capacitive-gain amplifier (CGA) with common-mode (CM) sampling (CMS) and switched-capacitor driving capability. The CMS CGA defines the amplifier CM voltage in a single auto-zero phase that significantly reduces the CM settling time. A pre-charge technique and dynamic filtering are used to allow the CGA to drive a switched-cap analog-to-digital converter (ADC) directly that relaxes the speed requirement on CGA and reduces folded noise aliases due to ADC sampling. As a result, it achieves 19-nV/ $\surd$ Hz noise density while dissipating 75 $\mu \text{A}$ . The 5 ppm/full-scale-range integral nonlinearity is achieved with programmable gain range from 1 to 128 with 2.7 to 3.6 V supply. It has 2 $\mu \text{V}$ typical offset and 0.81 ppm/°C max gain error drift. The CGA was implemented in a 0.18- $\mu \text{m}$ CMOS 1.8/3.3 V ultra low leakage technology and occupies only 0.53 mm2 die area.