Abstract
This paper demonstrates a 17.5-Gb/s complete transceiver with a MaxEye-based autonomous adaptation of equalization in a 40-nm CMOS process. The output stage of the transmitter employs 3-tap finite-impulse response (FIR) equalization. The receiver compensates the attenuation of the cable with a 2-stage continuous time linear equalizer (CTLE) and 5-tap decision-feedback equalizer (DFE). Based on the MaxEye algorithm, the peak gain of CTLE and the tap weights of DFE are adaptively controlled to support a wide range of channel characteristics. A dual-loop clock and data recovery circuit (CDR) using a bang-bang phase detector is implemented. The entire transmitter and receiver respectively consume 90.1 mW and 94.9 mW under a 0.9-V supply while operating at 17.5 Gb/s, respectively.
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