A 1.2V receiver front-end for multi-standard wireless applications in 65 nm CMOS LP

Abstract

A low-power low-voltage wide-band inductor-less multi-standard receiver RF front-end in a digital CMOS 65 nm Low Power (LP) process is described. S11 less than -10 dB is measured in the frequency range from 10 MHz up to 5 GHz. The front-end featuring two gain modes, achieves a voltage gain of 29 dB in the high voltage gain mode, and a voltage gain of 23 dB in the low voltage gain mode. The 3 dB bandwidth of the RF front-end is 2.5 GHz. The measured NF at 1 GHz is 5.5 dB in the high gain mode and 7.7 dB in the low gain mode. The front-end achieves an IIP3 of -13.5 dBm and -7.5 dBm in the high and the low gain mode, respectively. It consumes 13 mA from a 1.2 V supply in both gain modes. The implemented front-end occupies a chip area of 670 um times 860 um.