A 12-b 1-GS/s 61-dB SNDR Pipelined-SAR ADC With Inverter-Based Residual Amplifier and Tunable Harmonic-Injecting Cross-Coupled-Pair for Distortion Cancelation Achieving 6.3 fJ/conv-step

Abstract

A 1GS/s 12-bit single-channel successive approximation register (SAR) assisted pipeline analog-to-digital converter (ADC) is presented. It consists of three stages (4b-4b-6b) with two one-bit interstage redundancies implemented. A novel Harmonic-injecting Cross-Coupled Pair (HXCP) is proposed in an inverter-based residual amplifier (RA) as a critical part of the presented ADC. By implementing the HXCP, the linearity of the RA is effectively improved and meanwhile the gain of the RA is boosted to about 8. The HXCP is designed to be tunable to enhance its robustness against PVT variation. The prototype single-channel ADC was fabricated in 28-nm CMOS process and achieves >60dB SNDR and >70dB SFDR up to 320MHz, corresponding to a 6.3fJ/conv. step FoMw and 170.5dB FoMs.