A 1.25Gb/s half-rate clock and data recovery circuit

Abstract

This paper presents a clock and data recovery (CDR) circuit with a new half-rate phase detector. The half-rate CDR circuit senses the input random data at full rate but employs a VCO running at a half frequency of the input data. At the locked condition, the circuit will generate two 625-Mb/s output sequences. The new half-rate phase detector applicable to the 1.25-Gb/s NRZ data stream is adopted to reduce the dead zone in phase characteristic. The CDR circuit is fabricated using the 0.35/spl mu/m CMOS technology and occupies 1800/spl mu/m/spl times/1800/spl mu/m chip area. Total power consumption of the chip is 54.8 mW under a 3-V supply voltage.