Abstract

The design of a narrow-band cascode CMOS inductive source-degenerated low noise amplifier (LNA) for 866 MHz UHF RFID reader is presented. Compared to other previously reported narrow-band LNA designs, in this paper the finite effect has been considered to improve the nanometric design, achieving simultaneous impedance and minimum noise matching at a very low power drain of 850 from a 0.7 V supply voltage. The LNA was fabricated using the IBM 130 nm CMOS process delivering a forward power gain () of , a reverse isolation () of , an output power reflection ( @866 MHz) of , and an input power reflection ( @866 MHz) of . It had a minimum pass-band of around 2.2 dB and a third-order input referred intercept point (IIP3) of .

Highlights

  • RFID is one of the fastest growing wireless communication technologies for commercial product tracking

  • As the low noise amplifier (LNA) is the first block in the front-end of the RFID reader which is tuned at a certain transreceiver frequency, it needs to be designed optimally to minimize the noise for the following stages and avoid the distortion of the source signal

  • Considerable research on CMOS LNA design in submicron technologies at 900 MHz have been reported by many authors in [1,2,3,4]

Read more

Summary

Introduction

RFID (radio-frequency identification) is one of the fastest growing wireless communication technologies for commercial product tracking. To overcome design tradeoff difficulties between gain, power, noise figure (NF) and matching in the optimization of the LNA, the design of the matching circuits at the input and the output are based, respectively, on minimal NF and maximal power transfer. Low power dissipation at low supply voltage is a significant design criterion for RFID applications synthesized by design trade-off between gain, NF, input and output impedance matching and high linearity. In this paper we discuss the design and the experimental results for a 0.7 V low-power 130 nm CMOS 866 MHz single-ended commonsource telescopic cascode LNA using an enhanced power constrained simultaneous noise and impedance matching (PCSNIM [5, 6]) technique

Principles and Circuit Design
Simulation and Experimental Results
Conclusion

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call

Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.