A 10-MHz bandwidth 70-dB SNDR 640MS/s continuous-time ΣΔ ADC using Gm-C filter with nonlinear feedback DAC calibration

Abstract

So far almost all wide-band (>10MHz) continuous-time ΣΔ ADCs use active-RC filters. Although this type of filter possesses excellent linearity, it behaves as a resistive load for the preceding stage, which requires a signal buffer. For high speed and high resolution applications, a low noise and low distortion signal buffer consumes quite large power. Gm-C filters have small capacitive loads, which avoids the need of a signal buffer. As a result, the ADC could achieve better power efficiency. However, due to the poor linearity, previous ΣΔ ADCs with Gm-C filters have low SNDR. In this work, the first Gm cell's nonlinearity is calibrated by a nonlinear feedback DAC. The principle of the novel compensation technique is that transfer functions of the Gm cell and the feedback DAC match each other so that the DAC has the same nonlinearity as the first Gm cell. Therefore the distortion is removed at the output. The concept is implemented in a 640MS/s CT EAADC for 10MHz signal bandwidth in a 0.18-μm CMOS process. After calibration, the modulator achieves 77/76/70dB DR/SNR/SNDR with 60mW power. The SNDR and power efficiency are much improved compared to previous ΣΔ ADCs with Gm-C filters. Without the power-hungry signal buffer, this novel on-chip calibration technique enables Gm-C-based ΣΔ ADC with similar SNDR and power efficiency as active-RC-based ΣΔ ADCs.