Abstract
A fourth-order switched-capacitor bandpass ΔΣ modulator is presented for digital IF receivers. The circuit operates at a sampling frequency of 100MHz. It is implemented in a 0.13-μm standard CMOS process. The measurement shows that signal-to-noise-and-distortion ratio (SNDR) and dynamic range (DR) achieve 68dB and 75dB, respectively, over a bandwidth (BW) of 200kHz and power dissipation is 8.2mW at 1.2V supply.
Full Text
Published Version
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a call