Abstract
Minimum Shift Keying (MSK) is a very attractive modulation and demodulation scheme for satellite communication systems. In this paper, the design, analysis, implementation, and testing of a high-speed MSK modem are described. This MSK modem has a nominal data transmission rate of 100 Mbits/s at an intermediate frequency of 1.7 GHz, and is designed with a new technique which is named "clock-slave carrier synchronization." Phase ambiguities caused by the divide-by-two circuit and carrier recovery loop are resolved by the new technique where the recovered carrier phase is subordinate to decision timing. Implementation is carried out using the remodulation method in the carrier recovery circuit and FM discriminator in the clock recovery circuit. Experimental results show the feasibility of this high-speed MSK modem with little performance degradation from the theoretical predictions. This modem is intended for the experiments through the Japanese Communication Satellite.
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