A 1.7-mW −92-dBm Sensitivity Low-IF Receiver in 0.13-<inline-formula> <tex-math notation="LaTeX">$\mu$ </tex-math> </inline-formula>m CMOS for Bluetooth LE Applications

Abstract

This paper presents a 1.7-mW low-intermediate-frequency receiver design for Bluetooth low-energy (BLE) applications. The design exploits particular aspects of BLE, such as the relaxed in-band interference characteristics, more precisely the $C/I_{1~\textrm {MHz}}$ , and the relatively high-frequency-shift keying modulation index, to deliver a high level of energy efficiency and simplicity to the receiver baseband architecture. Reliable quadrature signals are generated in the RF signal path without consuming energy, which is supported by an inverter-based low-noise amplifier (LNA) that achieves high gain and low noise figure under low-power budgets. A small-signal analysis of low-power inverter-based LNAs is presented offering simple design equations. Seeking an affordable solution, the fabricated prototype is fully integrated into an earlier generation CMOS technology node ( $0.13~\mu \text{m}$ ), occupying a silicon area smaller than 0.7 mm2. The receiver achieves a sensitivity level of −92 dBm while consuming 1.41 mA from a 1.2-V supply.