Abstract

In this paper, a 0.8-1.8 GHz monolithic low noise amplifier (LNA) is designed and fabricated based on the 0.5 $\mu$m GaAs pHEMT process. By utilizing two cascode amplifiers as gain cells, high gain bandwidth product and high linearity are obtained in this LNA. To achieve the wideband response and low chip size, a self-biasing circuit combing the RC negative feedback technique is employed in this LNA. Basing with 67 mA at 5 V, measured results of this LNA show a gain (S21) of 15 ± 0.3dB, a input/output return loss (S11 and S22) of -15 dB and -20 dB, a 1dB output compression point (P1dB) of about 19 dBm, a input third-order intercept point (IIP3) of above 10.5 dBm within the frequency range of 0. 8-1.8GHz. The LNA occupies a small chip size of 0.7× 0.65mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> . Thus, the application requirement in 5G communication system can be met by this LNA.

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