Abstract

The counting of the consecutive ionization clusters in a drift chamber is a very promising technique for particle identification purposes. Up to now the bottleneck for the application of this technique was the possibility of realizing a large number of very-fast read-out channels with reduce power consumption. Typical time separation between each ionization act in a helium-based gas mixture is from a few ns to a few tens of ns. Thus the read-out interface has to be able to process such a high-speed signals. In this paper, the first realization of a CMOS 0.13 μm integrated readout circuit, including a fast variable gain amplifier (VGA) with 160 MHz bandwidth is designed for the central tracker of a future collider (ILC, super-B). The VGA circuit has been optimized for low power consumption. Moreover, it presents a programmable power consumption (8.4 mA, 9.4 mA, 10.6 mA) according to the gain setting (0dB, 10dB, 20dB). The design issues and the measured performance associated to this architecture are discussed.

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