A 0.0046 mm2 low-distortion CMOS neural preamplifier for large-scale neuroelectronic interfaces

Abstract

We present a design and analysis of nonlinear distortions for low-area integrated neural preamplifier with pseudoresistor-based AC coupling. We evaluate the distortions as a function of frequency, signal amplitude and sizing of the pseudoresistors. We describe a preamplifier design in 0.18 µm SOI CMOS technology with Total Harmonic Distortions (THD) below 1% in the full range of frequencies and amplitudes of extracellular neural signals. The circuit noise is 5.82 µV rms in the Local Field Potential (LFP) frequency range (1-300 Hz) and 4.45 µV rms in the action potential (AP) range (300 Hz-5 kHz). The preamplifier occupies silicon area of 0.0046 mm2 and is suitable for recording systems with >10,000 channels per cm2 of the chip area, providing high-fidelity amplification for large-scale neural interfaces.