Abstract
This paper presents a comprehensive design of a fully integrated multistage GaAs HBT power amplifier that achieves both linearity and high efficiency within a chip area of 0.855 mm2 for 4G and 5G applications covering the lower frequency band of 700–800 MHz. A novel linearizer circuit is integrated to a dual stage class-AB PA to minimize the AM-PM (Amplitude Modulation-Phase Modulation) distortion generated by the parasitic capacitance at the PN-junction under low bias current condition. The linearized power amplifier is able to operate within a 100 MHz linear operating bandwidth (700-800 MHz) while meeting the adjacent channel leakage ratio (ACLR) specification for 4G and 5G application. The fully integrated PA achieves a wideband efficiency of 57.5% at 28.5 dBm output power. Observing a respective input and output return losses of less than 13 dB and 10 dB, the PA delivers a power gain within the range of 34.0-37.0 dB across the operating bandwidth while exhibiting an unconditional stability characteristic from DC up to 5 GHz. The proposed linearization method paves the way of reducing the complexity of linear and high efficiency PA design which is associated with complicated and high-power consumption linearization schemes.
Highlights
As the demand for high data rate, low latency and reliable wireless communication increases globally, extensive efforts have been taken in the standardization of the 4G and future 5G mobile systems which include newer frequency bands [1]
Envelope tracking power amplifier (ETPA) is continuously gaining popularity to improve the efficiency of linear Power Amplifier (PA)
MEASUREMENT RESULTS Fig. 9 illustrates the photomicrograph of the proposed PA designed with 2 μm InGaP/GaAs hetero-junction bipolar transistor (HBT) process
Summary
As the demand for high data rate, low latency and reliable wireless communication increases globally, extensive efforts have been taken in the standardization of the 4G and future 5G mobile systems which include newer frequency bands [1]. The solution to improve η at backed off output power is either to reduce the back-off level by reducing the Pmax (smaller device size) or to introduce efficiency enhancement techniques. Envelope tracking power amplifier (ETPA) is continuously gaining popularity to improve the efficiency of linear PA This technique utilizes the supply modulation method where the supply voltage of the PA is modulated respective to the RF input drive voltage while sustaining a constant load resistance. A novel technique is introduced to improve the linearity of a PA at reduced back off level by integrating an analog pre-distorter and phase linearizer block at the input of a class-AB amplifier. A parallel combination of C15 and C16 is desired to reduce the Equivalent Series Resistance (ESR) inherited in the capacitor
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