A 0.6 V voltage reference circuit with 57 ppm/°C temperature coefficient, 73 KΩ output impedance and 0.080%/V line sensitivity for energy efficient applications

Abstract

In this paper, a voltage reference circuit generating 0.6 V developed in the Semiconductor Laboratory (SCL) 0.18 μm standard CMOS technology has been presented. It is based on the principle of Beta multiplier circuit. Operating under a supply voltage of 1.8V, the proposed reference accomplishes a line sensitivity as low as 0.080%/V across a voltage range of 1.8 V to 3.5 V. In addition to a low line sensitivity, it achieves a low temperature coefficient of 57 ppm/ °C over the temperature range of −40 °C to +85 °C. The circuit furnishes a power supply rejection ratio (PSRR) of −75.72 dB. The improved load regulation feature allows the circuit to drive loads as low as 73 KΩ with minimum variation. A reliable nature of the circuit has been observed on examining the response for different process corners and variations.