Abstract
This letter presents a low-power continuous-time delta-sigma modulator (CTDSM) that operates at a 0.6 V supply. The loop filter of the CTDSM is realized with inverter-based integrators and negative-R compensation on each integrator’s virtual ground. A body-biasing technique is used for inverters as well as for negative-Rs to ensure robustness against process, voltage, and temperature (PVT) variations. A prototype CTDSM is fabricated in a 28 nm CMOS process, and achieves 83 dB SNDR, 84 dB SNR, and 86.5 dB DR in a 40-kHz bandwidth, while consuming only 33.6 W from a 0.6 V supply. This corresponds to the state-of-the-art Schreier FoM of 177.3 dB.
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