Low Power Sigma Delta Modulator Design

Abstract

Integrated circuit designers face challenges due to process (P), supply voltage (V) and temperature (T) variations that become even more complex with low power design. To include the PVT variations, Process insensitive design methodology has to be adapted to the circuit/block design. A process, temperature compensated low-power operational amplifier (Op-Amp) design is discussed using process insensitive design methodology. The current source of the compensated Op-Amp is designed to ensure better tolerance to process and temperature variations. Various performance parameters are calculated for the proposed Op-Amp and compared with the uncompensated Op-Amp. Monte-Carlo simulations are performed by considering the threshold voltage (Vth) variations and the design is optimized to obtain fewer variations than the uncompensated structures. Using the proposed compensated Op-Amp, a low power continuous time sigma delta modulator is designed with a bandwidth of 18 KHz and oversampling ratio (OSR) of 64. Main blocks required for sigma delta modulator like difference amplifier and integrator are designed with the proposed compensated Op-Amp. The remaining blocks used for modulator such as band gap voltage reference(BGR) circuit and 1- bit SRAM latch are also modified to achieve low power and better tolerance for process variations. The total power consumption of the sigma-delta modulator with these improved blocks and the compensated Op-Amp is 236 \(\mu\)W, whereas with the uncompensated Op-Amp is 1960 \(\mu\)W. Thus, the proposed sigma delta modulator achieves better tolerance to the PVT variations by consuming low power.