A 0.59 nW/kHz Clock Circuit with High-Precision Clock Calibration for Passive Internet of Things Chips

Abstract

The high precision and low power consumption of the clock generator are critical in passive RFID transponders and passive IoT chips, but fluctuations in PVT can cause considerable degradation in the precision of the chip’s internal clocks. This paper proposes a high-precision clock circuit with a single-shot calibration method to addresses this issue in a low-power clock solution. Based on the reference timespan in the preamble of the down-link RF envelope, a TDIF (Time-digital to current-frequency) calibration method was implemented with both a streamlined procedure and customized circuits. By computing the difference between the time counts and applying it to an ultra-low-power, current-starved oscillator, the current change ratio can be linearly controlled. Compared to the traditional integer frequency division scheme used by passive tags for a 160 k bits up-link data rate, the required frequency for the clock generator was reduced from 960 kHz to 320 kHz, the calibration error was reduced from ±10% to ±3% for ±25% frequency deviation, the calibration time was 133.3 μs for a single shot in this work, and the power consumption was 158 nW after the calibration was completed. This leads to an excellent power efficiency of 0.59 nW/kHz and meets the requirements of low power, low cost, and PVT robustness in the RF-powered passive IoT chips. By appropriately increasing the number of calibration digits and the duration, this calibration approach could also be used for other ultra-low-power passive IoT chips that require higher-precision clocking without the use of off-chip crystals.