Abstract

Objective: In this work the design of a fourth-order Reconfigurable Sigma Delta analog-to-digital converter (ΣΔ ADC) for 5MHz, 7MHz or 10MHz channel bandwidths are presented. Materials and methods: Our design technique aims to keep the same ADC architecture in response to multi-band and multi-mode aspects of Mobile WiMAX standard. To this end, we set each sampling frequency corresponding to each channel bandwidth, in order that the same OSR value would be kept for the different channel bandwidths. This technique is intended to optimize the power and area of the ADC that efficiently covers varying channel bandwidths. Moreover, we use the pole placement method to calculate the optimized filter coefficients of Continuous-Time Sigma-Delta (CT ΣΔ) ADC. Results and discussion: Over 5MHz, 7MHz and 10MHz channel bandwidths, the ADC achieved 72.89dB, 67.26dB and 66.47dB peak SNR values, respectively and a dynamic range of 73.5dB, 69.47dB and 66.5dB respectively with only 28mW, 28.2mW and 28.6mW power consumption respectively. Conclusions: The design of the proposed reconfigurable ADC intended for use in the mobile WiMAX standard were achieved. Moreover, the results obtained are satisfactory and are in accordance with theoretical expectations.

Highlights

  • WiMAX (Worldwide Interoperability for Microwave Access) embodies the IEEE 802.16 family of standards that provision wireless broadband access

  • We proposed a fourth-order reconfigurable CT ΣΔ ADC intended for use in the mobile WiMAX standard

  • We used the pole placement method introduced in [17], a linearization technique of CT ΣΔ loop, to calculate and analyze the noise shaping transfer function (NTF) of the CT ADC according to the loop gain variation

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Summary

Introduction

WiMAX (Worldwide Interoperability for Microwave Access) embodies the IEEE 802.16 family of standards that provision wireless broadband access. A CT ΣΔ ADC is an attractive choice of ADC implementation as it possesses inherent antialiasing filter characteristics and relaxed requirements on integrators, eliminating the need for additional filtering and sampling circuitry, mitigating power consumption. They do not require complex switching and clocking mechanism, paving the way for very high OSR [9]. They are less robust against jitter effects and excess loop delay compared with their discrete-time counterparts [10] For this reason, we proposed a fourth-order reconfigurable CT ΣΔ ADC intended for use in the mobile WiMAX standard.

The Proposed Reconfigurable CT ΣΔ ADC Architecture
Design Method of the Reconfigurable CT ΣΔ ADC
Regulated Telescopic OTA Design
Latched Comparator
Clock Generator
WP LP
SNR Versus Normalized RC Time Constant
Conclusions
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