Abstract
A low-voltage, high-speed flash ADC is designed. The bottleneck of the operation speed in the low-voltage region is the delay time increase of the comparator. The temporarily boosted comparator is proposed to address this problem. The proposed circuit only boosts the supply voltage in the comparison phase, and therefore, can reduce the delay time while keeping the power overhead to a minimum. Moreover, the body bias control calibration is combined with the temporarily boosted technique. This helps to create a low-power and high-precision comparator. A 0.5-V, 6-bit flash ADC was designed by using 65-nm CMOS technology to demonstrate the effectiveness of the proposed technique. The simulation results showed a high sampling frequency of 1.2 GHz, a low power consumption of 1.4 mW, and an FOM of 28 fJ/conv.-step even at a low supply voltage of 0.5 V.
Highlights
Power reduction in a medium resolution and high-speed analog-to-digital convertor (ADC) is strongly required for front end of wireless systems and read channels of disk systems
Successive approximation registers (SAR) and flash ADCs are mainly used for medium resolution and high-speed applications
The sampling frequency of a flash ADC running on a 0.5-V supply voltage is limited by the comparator delay; reducing the comparator delay is essential for enhancing the sampling frequency
Summary
Power reduction in a medium resolution and high-speed analog-to-digital convertor (ADC) is strongly required for front end of wireless systems and read channels of disk systems. Several previous works on low-voltage and high-speed flash ADCs have been conducted [7] [8]. These ADCs run on a 0.5-V supply voltage; the sampling frequencies are 600 MHz and 420 MHz, which are insufficient values for the above-mentioned applications. The sampling frequency of a flash ADC running on a 0.5-V supply voltage is limited by the comparator delay; reducing the comparator delay is essential for enhancing the sampling frequency. We show the simulation results of a designed flash ADC by using the proposed comparator
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