A 0.5–1.7 V Efficient and PVT-Invariant Constant Subthreshold gm Reference Circuit in CMOS

Abstract

This paper presents a low-power constant subthreshold transconductance reference circuit that produces a constant transconductance by subtracting the output currents of two independent transconductance references. By taking the difference between the output currents of the two independent transconductance references, process, voltage and temperature variations are reduced by minimizing the effects of channel length modulation and drain-induced barrier lowering without relying on feedback to regulate the drain voltage. The proposed reference, fabricated in TSMC’s 130 nm process and testing with off-chip temperature-insensitive resistors, can provide a constant transconductance over a temperature range of −30 to 120°C, and a supply voltage range of 0.5 to 1.7 V. The experimental result of the proposed transconductance reference shows an average variation of ±0.8% over temperature for the entire operating voltage range and an average variation of ±1.97% over voltage for the entire operating temperature range. Through the subtraction, the proposed circuit also shows less variation across process corners compared to the conventional constant transconductance reference. The proposed constant transconductance reference exhibits the highest power efficiency (transconductance over power consumption) amongst the reported constant transconductance references. At 0.5 V, the proposed transconductance reference produces a transconductance of 21.46 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu \text{S}$ </tex-math></inline-formula> , while consuming 1.95 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu \text{W}$ </tex-math></inline-formula> .