8 - Shared-Memory SIMD Computers

Abstract

This chapter describes the shared-memory SIMD computers. SIMD computers are divided into two broad categories according to the way used by the processors to communicate and exchange data. In one category, the processors communicate through an interconnection network such as the linear array, the perfect shuffle, the mesh, the tree, and the cube. The other category comprises those computers in which the processors communicate through a shared memory. The chapter presents a parallel sorting algorithm for the shared memory SIMD computer. It uses n1−e processors, where 0 <e > 1, to sort a sequence of n integers in 0(n log n) time, for a cost of 0(n log n) that is optimal. The parameter e is quite important as it depends on the number of available processors on a given parallel computer. The rounding should be done pessimistically. The real n1−e representing the number of processors used by an algorithm should be rounded down to ensure that the resulting integer does not exceed the actual number of available processors. By contrast, the real ne representing the worst-case running time of an algorithm should be rounded up to ensure that the resulting integer is not smaller than the true worst-case running time.