65.2: Invited Paper: Bias‐Stress‐Induced Charge Trapping in Flexible Polymer Gate Dielectrics in Organic TFTs

Abstract

Recent studies by our group on bias‐stress‐driven electrical instabilities in organic thin‐film transistors (OTFTs) are described. When OTFTs are operated under continuous gate and source/drain biases, the resulting bias stresses can degrade overall device performance. Here, general methods for analyzing such bias instabilities are introduced. Based on these methods, it is demonstrated that the polymer chain ends of polymer gate dielectrics can act as charge trapping sites. Furthermore, a new strategy for analyzing charge traps at the semiconductor‐dielectric interface is introduced.