60 GHz Common-Gate Single-Stage Current Reuse Cascode LNA Topology for High-Data-Rate Applications

Abstract

In the design of complementary metal oxide semiconductor (CMOS) radio-frequency (RF) components, power dissipation and speed are the two important and conflicting factors which lay stringent requirements on RF design. In this work, a low-noise amplifier (LNA) is designed by using common-gate (CG–CG) current reuse topology and a cascode amplifier with current mirror feedback. The CG–CG low-noise amplifier with current reuse topology attains maximum forward gain of 11 dB and minimum noise figure of 3.2 dB at the desired 60 GHz using 90-nm CMOS virtuoso cadence technique. The designed LNA gives both input and output matching $$< -10$$ dB at 60 GHz and a power dissipation of 7.5 mW.