Abstract
It is envisaged that 6G network technology will be popular due to its higher working frequencies than 5G networks, and this will ensure higher data rates, greater capacity and lower latency. 6G mobile technology will support submicrosecond delays which makes communication almost instantaneous. Realization of these goals depend on faster circuits with low noise levels in both transmitters and receivers. In this work, a low noise amplifier (LNA) was designed in 65nm UMC CMOS technology with Cadence Spectre. Differential common source topology with integrated inductors were utilized to achieve low differential noise and better matching performance with higher gain. Proposed LNA has 20dB gain at 6GHz, and the gain is higher than 13dB from DC to 8 GHz. Minimum noise figure is 2.24 dB and S11 is -30dB at 6GHz. Simulated IIP3 is -6.5dBm. The design works with 3.6 mA total current from 1.2V supply voltage.
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